1. Field of the Invention
The present invention relates to a test signal output circuit provided in an LSI (Large Scale Integrated Circuit).
2. Description of the Related Art
Highly integrated LSIs are currently being manufactured owing to the remarkable progress in semiconductor technology, minute parts processing technology and system technology. Such a high degree of integration was unimaginable only a decade age. It is now possible to accommodate electronic circuits with as many as 30 thousand gates in a ceramic case only 2.8 cm.times.0.7 cm in size. As a result, it has become possible to mount an arithmetic processor for calculating trigonometric function or a memory of 16 mega bits on a single chip.
However, at the same time, the accelerated high integration of circuits of this kind has made it more difficult to evaluate or test an LSI, because, though a large number of circuits for complex arithmetic can be accommodated in a high-density arrangement, there is an unavoidable limit to the number of external connection terminals that can be accommodated in the same space. In other words, it is impossible to evaluate or test the large number of circuits only by observation of signals from the external connection terminals which are available for users. Before packaging an LSI, signal waveforms of a designated portion inside the LSI can be observed through a method which employs a probe; however, this method is naturally neither applicable to the testing of already packaged products, such as products returned by users, nor is it applicable to minute products before packaging due to the progress of miniaturization of the internal wiring that has accompanied the advancement of the high integration of LSIs. Therefore, it is indispensable to provide test signal output means which will allow observation at the external connection terminals of signal waveforms of designated portions inside LSI.
One conventional test signal output circuits of this type comprises, in addition to the normal external connection terminals, a plurality of test signal output terminals not available for users. These test signal output terminals are connected to the designated portions inside the LSI whose signal waveforms must be observed.
Another conventional test signal output circuit of this type responds to test mode signals supplied to test mode signal input terminals to switch the LSI from normal operating mode to test mode and uses normal external connection terminals for outputting test signals while the circuit is in test mode.
The former of the above conventional techniques requires the provision of a plurality of exclusive test terminals on the surface of the LSI in addition to normal external connection terminals, and hence it has the drawbacks that it not only reduces the degree of integration of the LSI, but also requires an increased number of terminals corresponding to the number of test signals. In the case of the latter technique, there are the drawbacks that it is incapable of outputting normal signals during test mode of the circuit and also entails a prolonged mode switching time according to the composition of the test mode signals.